NBTI in dual gate oxide PMOSFETs

Abstract

In advanced analog and mixed signal applications, Negative Bias Temperature Instability (NBTI) in dual gate oxide (DGO) technologies poses significant challenges for process development and robust analog circuit design. In this paper, Vt mismatch shift due to NBTI in a cascode current mirror is examined. The impact of stress time, temperature, gate voltage, drain voltage, and annealing on NBTI degradation is investigated over a wide range of stress conditions. Proper process trade-offs must be made to reduce NBTI degradation while integrating a DGO module into a high performance CMOS core process.