Characterization and optimization of deep dry etching for MEMS applications

A. Rickard, Mark E. McNie
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引用次数: 14

Abstract

Deep dry etching of silicon has become an increasingly important process for a number of applications, including optical and microinertial MEMS. The Bosch process, with alternate etch and deposition steps, has become a dominant technique. Key responses include etch rate and depth uniformity. Two of the most important factors determining these are aspect ratio dependent etching (ARDE) and loading effects: both global and local. An RSM (response surface methodology) experiment was performed as the basis for subsequent optimization of the etch with respect to ARDE. The wall angle, etch rate and uniformity across the wafer were kept within predefined limits. By sacrificing some etch rate (approximately equals 25%), it was possible to achieve more than a 50% reduction in the difference in etch depth between 2 micrometers and 20 micrometers wide features. Loading effects, dependent on the exposed surface area of silicon, cause local or global variations in the etch rate. To investigate these effects, silicon wafers were patterned with different densities to change the global exposed surface area from 1% - 27%. Local density variations were used to investigate microloading. The etch rate decreased almost linearly with global exposed silicon area. Local variations showed a less pronounced effect.
用于MEMS应用的深干刻蚀的特性和优化
硅的深干刻蚀已成为许多应用中越来越重要的工艺,包括光学和微惯性MEMS。博世工艺,交替蚀刻和沉积步骤,已成为主导技术。关键响应包括蚀刻速率和深度均匀性。决定这些的两个最重要的因素是纵横比相关蚀刻(ARDE)和加载效应:包括全局和局部。以响应面法(RSM)实验为基础,对后续的蚀刻工艺进行了优化。晶圆片的壁角、蚀刻速率和均匀性都保持在预定的范围内。通过牺牲一些蚀刻速率(大约等于25%),可以实现在2微米和20微米宽特征之间的蚀刻深度差异减少50%以上。加载效应,取决于硅的暴露表面积,引起局部或全局的蚀刻速率变化。为了研究这些影响,硅片被设计成不同密度的图案,以改变全球暴露表面积从1%到27%。局部密度变化用于研究微加载。蚀刻速率随整体暴露硅面积的增加几乎呈线性下降。地方差异的影响不那么明显。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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