The numerical simulation of substrate and gate currents in MOS and EPROMs

Abstract

The gate current that flows during programming in the flash EEPROM device is a result of hot electron injection from the channel. The channel doping is high and the drain junction is abrupt and optimised to enhance the hot carrier avalanche generation in the silicon near the drain junction. As in the case with conventional MOS, this has the further impact of creating a high substrate current. In this work, a new model for both substrate and gate current using the same hot carrier energy distribution function in both models is presented. These models predict gate and substrate currents over a wide range of gate voltages and have been validated for both electron and hole hot carrier avalanche generation in n- and p-channel transistors. These models have been used to simulate flash EEPROM programming so that reliability issues, particularly with respect to the effect of the gate current due to hot hole injection, could be investigated.