Grain boundary effects on subthreshold behaviour in single grain boundary nano-TFTs

International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003. Pub Date : 2003-09-29 DOI:10.1109/SISPAD.2003.1233673

P. Walker, H. Mizuta, S. Uno, Y. Furuta

引用次数: 2

Abstract

A simulation model for deep trap states at grain boundaries in Poly-Si TFTs is developed. The model is used for simulation of single GB TFT devices with sub micron channel lengths. The transport physics is clarified and it is found that in short channel devices (L/sub eff/<100 nm) the single GB TFT shows improved subthreshold behaviour compared to its SOI equivalent.

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晶界效应对单晶界纳米tft亚阈值行为的影响

建立了多晶硅晶体管晶界深阱态的模拟模型。该模型用于亚微米通道长度的单GB TFT器件的仿真。输运物理得到澄清，并发现在短通道器件(L/sub /<100 nm)中，与等效的SOI相比，单GB TFT表现出更好的亚阈值行为。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003.

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