M. Ancona, J. B. Boos, N. Papanicolaou, W. Chang, B. R. Bennett, D. Park
{"title":"Modeling gate leakage in InAs/AlSb HEMTs","authors":"M. Ancona, J. B. Boos, N. Papanicolaou, W. Chang, B. R. Bennett, D. Park","doi":"10.1109/SISPAD.2003.1233695","DOIUrl":null,"url":null,"abstract":"To simulate gate leakage in InAs/AlSb HEMTs, we create a detailed model within the framework of density gradient theory that incorporates the entire InAs/AlSb heterostructure, the quantum confinement and non-parabolicity effects in the InAs well and generation/recombination at the Type II InAs/AlSb heterojunction (via both the spatially indirect hand-to-hand process and interface traps). Each of these ingredients is described individually and they are then put together as a model of gate leakage. Comparisons of preliminary leakage simulations with experiment suggest that interface traps are essential for understanding the behavior especially at low voltages.","PeriodicalId":220325,"journal":{"name":"International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003.","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-09-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SISPAD.2003.1233695","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
To simulate gate leakage in InAs/AlSb HEMTs, we create a detailed model within the framework of density gradient theory that incorporates the entire InAs/AlSb heterostructure, the quantum confinement and non-parabolicity effects in the InAs well and generation/recombination at the Type II InAs/AlSb heterojunction (via both the spatially indirect hand-to-hand process and interface traps). Each of these ingredients is described individually and they are then put together as a model of gate leakage. Comparisons of preliminary leakage simulations with experiment suggest that interface traps are essential for understanding the behavior especially at low voltages.