New Testability Measures For High Level Description Of Circuits

M. Gentil, D. Crestani, A. Rhalibi, C. Durante
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Abstract

This paper proposes high level testabillty measures based on constraints propagation approach and symbolic fault modelling. These measures are compared with some others on a circuit example poinung out their accunacy to show the circuit areas which are difficult to test.
电路高级描述的新可测试性措施
本文提出了基于约束传播方法和符号故障建模的高级可测试性度量方法。在电路实例中,将这些测量方法与其他测量方法进行了比较,指出了它们的准确性,以显示电路中难以测试的区域。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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