Electrical modeling and analysis of lead-bonded and wire-bonded /spl mu/BGA/sup /spl reg// packages for high-speed memory applications

Byongsu Seol, L. Pflughaupt
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引用次数: 4

Abstract

Lead-bonded /spl mu/BGA (/spl mu/BGA/sup /spl reg//) and wire-bonded /spl mu/BGA (/spl mu/BGA/sup /spl reg//-W) packages with flex- and laminate-based substrates have been developed for high-speed memory devices. This work presents the inductance, capacitance, and resistance values for lead-bonded and wire-bonded /spl mu/BGA packages obtained from simulation study to demonstrate and compare their electrical performance. The effect of the bonding technology (lead or wire bond), die-shrink and the type of substrate material on the electrical performance for the /spl mu/BGA package was analyzed by simulation. To verify these results, they were compared to the experimentally measured values. In addition, the electrical performance limitation of the /spl mu/BGA packages was determined by conducting simulation analysis to obtain S-parameters. The bandwidth of the /spl mu/BGA packages was predicted based on the return loss and insertion loss calculated from the S-parameters.
用于高速存储器应用的铅键和线键/spl mu/BGA/sup /spl reg//封装的电气建模和分析
采用柔性基片和层压基片的铅键/spl mu/BGA (/spl mu/BGA/sup /spl reg//)和线键/spl mu/BGA (/spl mu/BGA/sup /spl reg//- w)封装已被开发用于高速存储器件。本文介绍了从仿真研究中获得的铅键合和线键合/spl mu/BGA封装的电感、电容和电阻值,以演示和比较它们的电气性能。通过仿真分析了键合工艺(引线或线键合)、模缩和衬底材料类型对/spl mu/BGA封装电性能的影响。为了验证这些结果,将它们与实验测量值进行了比较。此外,通过仿真分析确定了/spl mu/BGA封装的电气性能限制,获得了s参数。基于s参数计算的回波损耗和插入损耗,预测了/spl mu/BGA封装的带宽。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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