Elimination of body effects in SOI CMOS devices

Abstract

Tremendous research is going on in using silicon-on-insulator (SOI) devices for commercial purposes. Many advantages, like low junction capacitance, complete isolation of devices, smaller layout area, low power consuming circuits and lesser delays have enhanced the possibility of faster circuits. Still, problems with the parasitic floating body effects in partially depleted SOI (PDSOI) devices exist. The effects of the floating body are studied through the DC characteristics of PDSOI device structures. Effects like the kink effect, loss of gate control, self-heating effect and impact ionization are investigated. The impact ionization and the bipolar latch up effects tend to dominate in partially depleted (PDSOI) devices. DC characteristics of body tied to source, dynamic threshold MOS (DTMOS), and PDSOI devices are presented.