Continuity and reliability assessment of a scalable 3×50μm and 2×40μm via-middle TSV module

S. V. Huylenbroeck, Yunlong Li, M. Stucchi, L. Bogaerts, J. D. Vos, G. Beyer, E. Beyne, M. Brouri, P. Nalla, S. Gopinath, Matthew Thorum, Joe Richardson, Jengyi Yu
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引用次数: 3

Abstract

An advanced TSV metallization scheme, featuring a high conformal ALD oxide liner, a thermal ALD WN barrier, an electroless NiB platable seed and a high throughput copper ECD filling is presented. Because of the high conformality of the WN barrier and NiB seed, very thin layers can be deposited, reducing the manufacturing cost significantly, while still guaranteeing continuous barrier/seed layers all along the TSV sidewall to the bottom of the TSV. 3 × 50μm via-middle wafers, processed with this metallization scheme, are further processed through the thinning module, by using temporary bonded carriers, the backside passivation module and a copper RDL module by using a semi-additive process. The TSV resistance is measured between the 5μm thick RDL copper layer at the back side and the METPASS aluminum layer at the wafer front side. Low spread and high yield is obtained on the resistance data distribution of both single kelvin and daisy chain structures. The same metallization scheme is successfully scaled to a 2μm diameter and 40μm deep via-middle module. The conformal deposition of the barrier and the seed layer enables further scaling down to aspect ratio 20:1 through silicon via's with 5μm pitch, still ensuring the void-free bottom up copper fill by electroplating. The integrity of the liner/barrier system against Cu diffusion from TSV to silicon has been verified using the established controlled I-V method. Field acceleration factors, extracted in both copper-confined and copper-driven regime, indicate good TDDB reliability of this advanced 2 × 40μm TSV middle module.
可扩展3×50μm和2×40μm中路TSV模块的连续性和可靠性评估
提出了一种先进的TSV金属化方案,该方案具有高保形ALD氧化物衬里,热ALD WN屏障,化学镀NiB种子和高通量铜ECD填充。由于WN屏障和NiB种子的高度一致性,可以沉积非常薄的层,大大降低了制造成本,同时仍然保证沿TSV侧壁到TSV底部连续的屏障/种子层。采用该金属化方案加工的3 × 50μm过中晶圆,通过临时键合载流子减薄模块、背面钝化模块和铜RDL模块采用半增材工艺进行进一步加工。测量晶圆背面5μm厚的RDL铜层与晶圆正面METPASS铝层之间的TSV电阻。单开尔文和菊花链结构的电阻数据分布均可获得低扩散和高产率。同样的金属化方案成功地扩展到直径2μm,深40μm的过孔-中间模块。屏障层和种子层的共形沉积使得通过5μm间距的硅孔进一步缩小到20:1的纵横比,仍然保证了电镀时无空洞的自下而上的铜填充。利用已建立的可控I-V方法验证了Cu从TSV向硅扩散的内衬/势垒系统的完整性。在铜约束和铜驱动条件下提取的场加速度因子表明,该先进的2 × 40μm TSV中间模块具有良好的TDDB可靠性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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