Ultra-thin flexible 100 V Chipfilm™ N-LDMOS

Abstract

System-in-foil (SiF) technology calls for low cost, ultra-thin and, high-performance high-voltage transistors to satisfy the need for high-voltage driving capability in many of the emerging flexible display technologies. An ultra-thin (20 μm) N-type lateral DMOS transistor (N-LDMOS) in Chipfilm™ technology, developed for this application, is presented. The fabrication process is fully compatible with conventional high-voltage CMOS technology using shallow trench isolation (STI). The N-LDMOS has a breakdown voltage >100 volts with a maximum drain current of 4.4 mA at a channel length of 9 μm and a width of 50 μm. At drain voltage Vds = 100 V, self-heating causes a reduction in drain current up to 19% on a silicon carrier wafer and 35% on polyimide (PI) foil relative to the drain current without self heating, thus indicating power dissipation to be one of most serious issues in flexible electronics.