The evaluation of 16-Mbit memory chips with built-in reliability

C. Stapper, W.A. Klaasen
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引用次数: 6

Abstract

Highly defective 16-Mb chips have been stressed under accelerated conditions to test the capability of on-chip error-correction circuits for reliability enhancement. The tradeoff between a manufacturing sort or screen yield and reliability was determined. The soft-error immunity of the trench capacitor technology in conjunction with error correction was also evaluated under accelerated conditions.<>
具有内置可靠性的16mbit存储芯片的评估
高缺陷的16mb芯片在加速条件下被强调,以测试片上纠错电路的能力,以提高可靠性。确定了制造类型或筛收率与可靠性之间的权衡。在加速条件下,对沟槽电容技术结合误差校正的软误差抗扰度进行了评价。
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