A novel poly-Si nanowire TFT for nonvolatile memory applications

2007 IEEE International Workshop on Memory Technology, Design and Testing Pub Date : 2007-12-03 DOI:10.1109/MTDT.2007.4547618

H. Hsu, Horng-Chih Lin, Jian-Fu Huang, Tiao-Yuan Huang

引用次数: 0

Abstract

A novel ploy-Si nanowire TFT-SONOS device configured with independent double-gate structure was fabricated and characterized. The electrical characteristics including programming and erasing properties were studied. Adding an adequate top-gate bias was found to improve the programming efficiency, resulting in larger memory window.

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用于非易失性存储器的新型多晶硅纳米线TFT

制备了一种具有独立双栅结构的新型聚硅纳米线TFT-SONOS器件并对其进行了表征。研究了其电学特性，包括编程性能和擦除性能。增加适当的顶栅偏置可以提高编程效率，从而产生更大的内存窗口。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2007 IEEE International Workshop on Memory Technology, Design and Testing

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