Copper interconnections for high performance and fine pitch flip chip digital applications and ultra-miniaturized RF module applications

Abstract

Copper is an excellent candidate material for next generation of chip-package interconnections because of its high electrical and thermal conductivities, good mechanical properties at assembly and operating temperatures and well-established infrastructure to integrate with back-end processes with electroplating technology downscalable to nanoscale. This technology can also accommodate the increasing I/O density of future microprocessors with the best electrical and mechanical performance. In addition, embedment of active components with chip-last approach being proposed by Georgia Tech PRC can also be realized with the shortest interconnections resulting in performance and miniaturization comparable to chip-first approach. There is an increasing trend to replace solders with copper because of these advantages. In this paper, we describe the current status of copper bumping and copper interconnection and assembly technologies and show our future strategy