Achieving Simplified Biasing Conditions with Pin Reduction Approach to enhance Static Fault Localization Capability

S. Moon, A. Quah, D. Nagalingam, K. H. Yip, C.Q. Chen, Y. Tam, P. T. Ng, H. Ng, G. Ang, J. Lam, Z. Mai
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Abstract

Successful fault localization is heavily dependent on the ability to replicate the failure mode in the analytical scanning optical microscope (SOM) system for defect isolation. However, typical SOM configuration with confined stage space is limited to about 4 probes – 4 SMUs resources for bench measurement. This has impeded the successful debug of functional IDDQ/powerdown leakage failure which may require higher pin counts to enter into leakage mode. In this paper, the static fault localization capability of such failures is enhanced with an engineering approach to simplify the biasing conditions for static debug within the SOM system with limited test resources. This is especially useful in a foundry environment that manufactures a wide variety of products from differentiated process lines. Several case studies were described to demonstrate how this optimized electrical FA flow was applied with great success to debug multiple challenging low yield functional leakage issues.
用引脚缩减法实现简化偏置条件,提高静态故障定位能力
成功的故障定位在很大程度上依赖于在分析扫描光学显微镜(SOM)系统中复制故障模式以进行缺陷隔离的能力。然而,典型的SOM配置限制了平台空间,限制了大约4个探头- 4个smu资源用于平台测量。这阻碍了功能IDDQ/断电泄漏故障的成功调试,这可能需要更高的引脚计数才能进入泄漏模式。本文采用工程方法,在有限的测试资源下,简化了SOM系统内静态调试的偏倚条件,增强了此类故障的静态故障定位能力。这在从不同的工艺线制造各种各样的产品的铸造环境中特别有用。本文描述了几个案例研究,以演示如何将这种优化的电气FA流程成功地应用于调试多个具有挑战性的低产量功能泄漏问题。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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