{"title":"Adhesive and conductive adhesive flip chip bonding","authors":"R. Zenner, G. Connell, J. Gerber","doi":"10.1109/ISAPM.1997.581272","DOIUrl":null,"url":null,"abstract":"Over the past decade the use of adhesives for electronic interconnect has been driven by the explosive growth of flat panel liquid crystal displays (LCD). Developed and used primarily by Japanese manufacturers of consumer products, particle-loaded adhesive films fulfilled a need in LCDs that could not be met by solder reflow: low temperature, high line density (to 50 /spl mu/m pitch) electrical interconnect to indium tin oxide (ITO) traces on glass. Adhesives may also be used for flip-chip assembly. The advantages of flip-chip attach technology are the same for solder or adhesive technology: footprint reduction, low interconnect resistance, short signal line length, and elimination of single-chip packaging costs. Lower parasitics decrease rise times and decrease power requirements. To prevent differential thermal expansion induced solder fatigue, flip-chip attachment using solder reflow requires the use of an underfill adhesive applied in a separate time-consuming process. Adhesive films described in this paper inherently provide an underfill, serve as environmental protection for the chip face, as well as make a solderless electrical connection. Performance results for fine pitch chips have shown stable interconnect resistance below 10 m/spl Omega/ for bumped chip applications and approximately 100 m/spl Omega/ with unbumped chip test vehicles. The adhesive flip-chip bonding process and environmental stress results will be presented in this paper.","PeriodicalId":248825,"journal":{"name":"Proceedings 3rd International Symposium on Advanced Packaging Materials Processes, Properties and Interfaces","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-03-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 3rd International Symposium on Advanced Packaging Materials Processes, Properties and Interfaces","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISAPM.1997.581272","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
Over the past decade the use of adhesives for electronic interconnect has been driven by the explosive growth of flat panel liquid crystal displays (LCD). Developed and used primarily by Japanese manufacturers of consumer products, particle-loaded adhesive films fulfilled a need in LCDs that could not be met by solder reflow: low temperature, high line density (to 50 /spl mu/m pitch) electrical interconnect to indium tin oxide (ITO) traces on glass. Adhesives may also be used for flip-chip assembly. The advantages of flip-chip attach technology are the same for solder or adhesive technology: footprint reduction, low interconnect resistance, short signal line length, and elimination of single-chip packaging costs. Lower parasitics decrease rise times and decrease power requirements. To prevent differential thermal expansion induced solder fatigue, flip-chip attachment using solder reflow requires the use of an underfill adhesive applied in a separate time-consuming process. Adhesive films described in this paper inherently provide an underfill, serve as environmental protection for the chip face, as well as make a solderless electrical connection. Performance results for fine pitch chips have shown stable interconnect resistance below 10 m/spl Omega/ for bumped chip applications and approximately 100 m/spl Omega/ with unbumped chip test vehicles. The adhesive flip-chip bonding process and environmental stress results will be presented in this paper.