A 32nm high-k and metal-gate anti-fuse array featuring a 1.01µm2 1T1C bit cell

Abstract

A 1 k-bit high-density OTP (One Time Programmable)-ROM array featuring a new anti-fuse memory is presented using 32nm high-k (HK) and metal-gate (MG) CMOS process. Our 32nm HK+MG SOC process technology enables smallest reported one-transistor one-capacitor (1T1C) bit cell area measuring 1.01μm2. The 32-row by 32-column array with a programmable sensing scheme demonstrates yield exceeding 99.9% and robust reliability.