DC Biased Field Plate RESURF for Further RDSON Reduction of LDMOS Transistors

Abstract

A new RESURF variant concept termed DC Biased Field Plate RESURF (BFP-RESURF) is proposed and studied through TCAD simulation in this work. The new LDMOS device structure features multiple field plates over the drift region that are biased at constant voltages. Significant reduction of ${\mathrm {R}}_{{\mathrm {DSON}}}$ can be achieved by a more ideal electric field profile and an accumulation channel induced by the BFPs. Simulation study indicates that the new BFP-LDMOS offers a specific ${\mathrm {R}}_{{\mathrm {DSON}}}$ of 58 m$\Omega$. m${\mathrm {}}m ^{2}$ comparing to 91 m$\Omega$. m${\mathrm {m}}^{2}$ of the conventional LDMOS, a 1.6X reduction at a BV of 100V. The concept could be further extended to a wider range of BV ratings, the ${\mathrm {R}}_{{\mathrm {DSON}}}$ benefit becomes more pronounced as BV goes higher. The switching performance shows no obvious difference between the BFP and standard LDMOS. The BFP-RESURF concept is completely compatible with conventional BCDMOS processes and scalable over a wide range of voltage ratings.