Clock signal distribution network for high speed testers

Abstract

A high-speed clock distribution network is described. By analyzing the transient behavior of the pulse signal along a multisection transmission line, the author develops a new impedance-matching methodology to reduce the internal multireflection processes due to the impedance discontinuities in the signal line. By means of the bisection method, the matched transmission line is converted into a single-input, 2/sup n/-output, binary-tree distribution circuit. The circuit is realized on a planar printed-circuit board. Experimental results show that this distribution system can provide equiamplitude, high-fidelity, nonskewed signals to all the output terminals for pulse signal frequency in excess of 800 MHz.<>