{"title":"An overview of algorithms in Gnucap","authors":"A. Davis","doi":"10.1109/UGIM.2003.1225766","DOIUrl":null,"url":null,"abstract":"This paper will present an overview of the algorithms in Gnucap. Gnucap is a mixed-signal circuit simulator. Algorithms to be presented include event driven analog simulation, the use of queues to accelerate simulation of large circuits, implicit mixed-mode simulation, where the simulator automates the interface between analog and digital portions of the circuit. These algorithms provide equivalent accuracy to Spice with significant speedup for some classes of circuits, including large mostly passive circuits with a few active devices, and large mixed-mode circuits with latency. An overview of work in progress will also be given. This includes cached model evaluation, which will exploit hierarchy and duplication in the circuit, and true multi-rate simulation.","PeriodicalId":356452,"journal":{"name":"Proceedings of the 15th Biennial University/Government/ Industry Microelectronics Symposium (Cat. No.03CH37488)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-09-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 15th Biennial University/Government/ Industry Microelectronics Symposium (Cat. No.03CH37488)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/UGIM.2003.1225766","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 16
Abstract
This paper will present an overview of the algorithms in Gnucap. Gnucap is a mixed-signal circuit simulator. Algorithms to be presented include event driven analog simulation, the use of queues to accelerate simulation of large circuits, implicit mixed-mode simulation, where the simulator automates the interface between analog and digital portions of the circuit. These algorithms provide equivalent accuracy to Spice with significant speedup for some classes of circuits, including large mostly passive circuits with a few active devices, and large mixed-mode circuits with latency. An overview of work in progress will also be given. This includes cached model evaluation, which will exploit hierarchy and duplication in the circuit, and true multi-rate simulation.