{"title":"Design and Implementation of a 1.2-to-17-GHz UWB SiGe LNA with a Peaking Inductor","authors":"Shu-Hui Yen, Yo‐Sheng Lin","doi":"10.1109/VDAT.2006.258130","DOIUrl":null,"url":null,"abstract":"In this paper, we demonstrate a 1.2-to-17-GHz ultra-wideband (UWB) low-noise amplifier (LNA) with multiple feedback loops implemented in a 0.35 mum SiGe BiCMOS technology. A method named inductive peaking, which adds an inductor in series with the base terminal of the second stage BJT to enhance the frequency of the dominant pole, was adopted to improve gain and bandwidth of the LNA. The measurement results show very flat gain (S21) of 8plusmn0.5 dB was achieved for frequencies lower than 15 GHz. In addition, reverse isolation (S12 ) lower than -27 dB, input return loss (S11) and output return loss (S22) lower than -9 dB, and noise figure (NF) lower than 5.7 dB was achieved in the 3.1-10.6 GHz UWB band. The chip area was 775 mum times 710 mum, excluding the test pads. This LNA drains 7 mA current at supply voltage of 3 V, i.e. it only consumes 21 mW power","PeriodicalId":356198,"journal":{"name":"2006 International Symposium on VLSI Design, Automation and Test","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 International Symposium on VLSI Design, Automation and Test","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VDAT.2006.258130","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
In this paper, we demonstrate a 1.2-to-17-GHz ultra-wideband (UWB) low-noise amplifier (LNA) with multiple feedback loops implemented in a 0.35 mum SiGe BiCMOS technology. A method named inductive peaking, which adds an inductor in series with the base terminal of the second stage BJT to enhance the frequency of the dominant pole, was adopted to improve gain and bandwidth of the LNA. The measurement results show very flat gain (S21) of 8plusmn0.5 dB was achieved for frequencies lower than 15 GHz. In addition, reverse isolation (S12 ) lower than -27 dB, input return loss (S11) and output return loss (S22) lower than -9 dB, and noise figure (NF) lower than 5.7 dB was achieved in the 3.1-10.6 GHz UWB band. The chip area was 775 mum times 710 mum, excluding the test pads. This LNA drains 7 mA current at supply voltage of 3 V, i.e. it only consumes 21 mW power