Self-stressing structures for wafer-level oxide breakdown to 200 MHz

Abstract

We have demonstrated for the first time high frequency (210 MHz) oxide breakdown at the wafer-level using on-chip, self-stressing test structures. This is the highest frequency oxide breakdown that has been reported. We used these structures to characterize the variation in oxide breakdown with frequency (from 1 Hz to over 200 MHz) and duty cycle (from 10% to 90%). Since the stress frequency, duty cycle and temperature are controlled by DC signals in these structures, we used conventional DC wafer-level equipment without any special modifications (such as high frequency cabling). This self-stressing structure significantly reduces the cost of performing realistic high frequency oxide breakdown experiments necessary for developing reliability models and building-in-reliability.