Modeling the Transient Behavior of MOS-Transistors during ESD and Disturbance Pulses in a System with a Generic Black Box Approach

Abstract

On-chip ESD protection in smart power technologies is often done with MOSFETs, either self-protecting or as dedicated ESD-protection. Turned on by intrinsic gate-drain capacitive coupling they conduct dynamically channel current as well as additional avalanche current depending on MOSFET type. A generic approach to model this transient behavior for system ESD and disturbance pulse simulation is presented.