Integration challenges of new materials and device architectures for IC applications

2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866) Pub Date : 2004-10-04 DOI:10.1109/ICICDT.2004.1309953

B. Nguyen, A. Thean, T. White, A. Vandooren, M. Sadaka, L. Mathew, A. Barr, S. Thomas, M. Zalava, Da Zhang, D. Eades, Zhonghai Shi, J. Schaeffer, D. Triyoso, S. Samavedam, V. Vartanian, T. Stephen, B. Goolsby, S. Zollner, Ran Liu, R. Noble, T. Nguyen, V. Dhandapani, B. Xie, X. Wang, J. Jiang, R. Rai, M. Sadd, M. Ramón, S. Kalpat, L. Prabhu, V. Kaushik, Y. Du, T. Dao, M. Mendicino, Marius K. Orlowski, P. Tobin, J. Mogab, S. Venkatesan

引用次数: 2

Abstract

In this paper, we will detail the issues with new materials being introduced into CMOS devices and present some potential solutions to enable high performance and low power CMOS for the 65nm node and beyond.

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集成电路应用中新材料和器件架构的集成挑战

在本文中，我们将详细介绍引入CMOS器件的新材料问题，并提出一些潜在的解决方案，以实现65纳米及以上节点的高性能和低功耗CMOS。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866)

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