A novel 3D TSV transformer technology for digital isolator gate driver applications

Abstract

In this paper, a novel 3D TSV (Through-Silicon-Via) transformer technology for power system-on-chip applications is proposed and demonstrated experimentally. The transformer used in the power system features a galvanic isolation of > 4 kV and a voltage gain of > -3 dB from 10 MHz to 100 MHz. It can be embedded in the bottom layer of a silicon substrate and sandwiched between system circuitries for ultimate area efficiency and the smallest possible form factor compared with other conventional on-silicon approaches. A digital isolator gate driver built using this transformer technology is achieved, and successful signal transfer is clearly illustrated.