Li Tian, Xuejian Qian, Gaojie Wen, Jinrong Song, Hao Zhang, Diwei Fan, Dong Wang
{"title":"Application of MOSFET characteristic measurement for electrical isolation of open defect on device level in failure analysis","authors":"Li Tian, Xuejian Qian, Gaojie Wen, Jinrong Song, Hao Zhang, Diwei Fan, Dong Wang","doi":"10.1109/IPFA.2016.7564282","DOIUrl":null,"url":null,"abstract":"With multi-metal layers and scaling down we occurred many difficulties in FA(Failure Analysis). Due to coverage of metal layers many signals couldn't be measured with planting probing pad in electrical analysis. And usually EMMI (Emission Microscope)or OBIRCH (Optical Beam Induced Resistor Change) analysis didn't reveal defect directly for open defect. So, it was difficult to isolate open failure and confirm its location on device level. In recent years some novel technologies or studies were developed for open defect, for example forcing method, triangular wave, logic time sequence analysis and so on. But we still couldn't make sure open location on device level with these methods. In this paper we proposed one novel and effective method for isolating open issue on device level. The main idea was that measuring MOSFET characteristics to confirm its status to isolate open defect. The two characteristics of MOSFET included Ids-Vds and Ids-Vgs curves which were applied to find open issue in two real cases respectively. In these two cases abnormal IdS-Vds and IdS-Vgs characteristics were detected respectively, and then we could deduce open issue based on measurement result. After PFA (Physical Failure Analysis), the defect was found to cause abnormal Ids. Thus, we believed the advantages of MOSFET characteristic measurement method were novel, effective and low cost. It was beneficial to our FA for open defect on device level in electrical failure isolation.","PeriodicalId":206237,"journal":{"name":"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"260 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA.2016.7564282","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
With multi-metal layers and scaling down we occurred many difficulties in FA(Failure Analysis). Due to coverage of metal layers many signals couldn't be measured with planting probing pad in electrical analysis. And usually EMMI (Emission Microscope)or OBIRCH (Optical Beam Induced Resistor Change) analysis didn't reveal defect directly for open defect. So, it was difficult to isolate open failure and confirm its location on device level. In recent years some novel technologies or studies were developed for open defect, for example forcing method, triangular wave, logic time sequence analysis and so on. But we still couldn't make sure open location on device level with these methods. In this paper we proposed one novel and effective method for isolating open issue on device level. The main idea was that measuring MOSFET characteristics to confirm its status to isolate open defect. The two characteristics of MOSFET included Ids-Vds and Ids-Vgs curves which were applied to find open issue in two real cases respectively. In these two cases abnormal IdS-Vds and IdS-Vgs characteristics were detected respectively, and then we could deduce open issue based on measurement result. After PFA (Physical Failure Analysis), the defect was found to cause abnormal Ids. Thus, we believed the advantages of MOSFET characteristic measurement method were novel, effective and low cost. It was beneficial to our FA for open defect on device level in electrical failure isolation.