Reliability assessment of low |Vt| metal high-κ gate stacks for high performance applications

C. Young, G. Bersuker, P. Khanal, C. Kang, J. Huang, C. Park, P. Kirsch, H. Tseng, R. Jammy
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引用次数: 1

Abstract

SILC analysis is a powerful tool for the assessment of breakdown characteristics of high-κ devices. By applying the SILC analysis during high field stress, we determined that the degradation mechanism for LaOx capped devices was drastically different as compared to the conventional Hf-based gate stacks. The La atoms diffused into the interfacial layer disrupting the SiO2 structure which may affect the reliability of the La-doped stacks. On the other hand, similar analysis applied to the stacks with the Ru-Al bi-layer gate electrode demonstrated that the Al-contained stacks were similar to that of the baseline samples indicating that Al atoms, which preferentially substitute for Si in SiO2, did not generate defects contributing to SILC.
用于高性能应用的低Vt金属高κ栅极堆叠可靠性评估
SILC分析是评估高κ器件击穿特性的有力工具。通过应用高场应力下的SILC分析,我们确定了LaOx封盖器件的退化机制与传统的hf基栅堆相比有很大不同。La原子扩散到界面层,破坏了SiO2结构,影响了La掺杂堆的可靠性。另一方面,对Ru-Al双层栅电极叠层的类似分析表明,含有Al的叠层与基线样品相似,这表明Al原子优先替代SiO2中的Si原子,不会产生导致SILC的缺陷。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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