The relationship between transistor-based and circuit-based reliability assessment for digital circuits

B. Vaidyanathan, S. Bai, A. Oates
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引用次数: 10

Abstract

Logic, analog, RF, SRAM, and DRAM circuits respond differently to NBTI and HCI induced time dependent parametric shifts. We analyze digital logic susceptibility to these transistor degradation mechanisms and identify the benefits of simulation based aging-induced reliability assurance at the product level.
基于晶体管和基于电路的数字电路可靠性评估的关系
逻辑,模拟,RF, SRAM和DRAM电路对NBTI和HCI诱导的时间相关参数移位的响应不同。我们分析了数字逻辑对这些晶体管退化机制的敏感性,并确定了在产品层面上基于仿真的老化诱导可靠性保证的好处。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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