Impact of the PCB design on the crack risk of CSP assemblies subjected to temperature cycling and drop tests

Abstract

Especially in the handheld context, we need always greater guarantees in product efficiency. Mobiles, notebooks, organizers, cameras etc. are assets whose use increases the probability of downfall. When an electronic product drops on the ground, impact force and deformation is transferred internally to the printed circuit board (PCB), solder joints and the integrated circuits (IC) packages. The IC packages are susceptible to solder joint cracks, induced by a combination of PCB bending and mechanical shock during the impact event. If a single drop event does not cause failure, repeated drop events can cause impact fatigue or accumulated damage and rupture of interconnection joints and assembly materials. Drop testing provides a useful experimental approach to design for drop reliability. Numerous are the studies on micro-assembly welding reliability, in which soldering, and also of a series of factors closely correlate such as the pad designs, finishes effects, choice of the materials, process techniques are taken into account. At the same time a European directive (RoHS) on the restriction of the dangerous substances, establishes the exclusion of lead from the electrical and electronic devices except for same applications. As a result, the Sn-Pb solders, commonly used in microelectronics chip packages, should be replaced by lead-free solder with a comparable, or preferably better, reliability. Sn-Ag-Cu eutectic seems to be one of the best candidates. In this study, the impact of PCB design on the failure risk of CSPs assemblies after temperature cycling and drop test was investigated. Different pad geometries, added to the most prevalent protective finishes were tested on Pb-based as well as on lead-free solder pastes. This paper aims to determinate the relationships between process effects, like voids or solder joints deformation and failures, but up to now only based on comparisons