Techno-economic analysis of competing IC packaging protocols

Abstract

Comparing alternative packaging technologies is a complex task, involving prioritization of cost, performance, and business strategy issues. This paper focuses on one portion of the decision-making equation - cost. Using a tool for assessing the manufacturing costs of electronic packaging, cost outlook scenarios for three advanced packaging technologies are analyzed and compared. The technologies are flip-chip-on-board (FCOB), wafer-scale chip-scale packaging (WSCSP), and a new wafer-scale-applied underfill technology called wafer pre-encapsulation. Using Technical Cost Modeling the paper tracks and examines the costs for the three implementations, starting from wafer-level through IC packaging to board placement. Manufacturing cost sensitivity is examined for a variety of manufacturing conditions and results are presented.