T. Yoneda, Y. Nakabo, N. Yamasaki, Masayoshi Takasu, Masashi Imai, S. Kameda, H. Oguma, A. Taira, N. Suematsu, T. Takagi, K. Tsubouchi
{"title":"Responsiveness and Timing","authors":"T. Yoneda, Y. Nakabo, N. Yamasaki, Masayoshi Takasu, Masashi Imai, S. Kameda, H. Oguma, A. Taira, N. Suematsu, T. Takagi, K. Tsubouchi","doi":"10.1007/978-4-431-56594-9_9","DOIUrl":null,"url":null,"abstract":"","PeriodicalId":127041,"journal":{"name":"VLSI Design and Test for Systems Dependability","volume":"7 5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-07-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"VLSI Design and Test for Systems Dependability","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1007/978-4-431-56594-9_9","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}