{"title":"A 4-PAM adaptive analog equalizer for backplane interconnections","authors":"Yen-Chuan Huang, Qui-Ting Chen, Tai-Cheng Lee","doi":"10.1109/VDAT.2008.4542447","DOIUrl":null,"url":null,"abstract":"Increasing of data rate has created a major challenge for electronic circuits used at the interface of the backplane physical layer links. As the data rate increases above Gb/s, intersymbol interference (ISI) becomes a critical issue in received signal quality, limiting the achievable transmission speed and distance over channels. A 4-PAM (pulse amplitude modulation) adaptive analog equalizer is proposed to compensate the FR-4 PCB backplane interconnections by using a sum- feedback filter (SFF), relaxing the design requirement of the conventional analog feed-forward equalizers (FFE). Fabricated in a 0.13- mum digital CMOS technology, the analog equalizer recovers 14 Gb/s random data transmitted over FR-4 PCB copper channels.","PeriodicalId":156790,"journal":{"name":"2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-04-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VDAT.2008.4542447","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
Increasing of data rate has created a major challenge for electronic circuits used at the interface of the backplane physical layer links. As the data rate increases above Gb/s, intersymbol interference (ISI) becomes a critical issue in received signal quality, limiting the achievable transmission speed and distance over channels. A 4-PAM (pulse amplitude modulation) adaptive analog equalizer is proposed to compensate the FR-4 PCB backplane interconnections by using a sum- feedback filter (SFF), relaxing the design requirement of the conventional analog feed-forward equalizers (FFE). Fabricated in a 0.13- mum digital CMOS technology, the analog equalizer recovers 14 Gb/s random data transmitted over FR-4 PCB copper channels.