Single-source hardware modeling of different abstraction levels with State Charts

Rainer Findenig, T. Leitner, W. Ecker
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引用次数: 1

Abstract

This paper presents an approach and a framework for hardware modeling on different abstraction levels, from untimed to cycle-accurate. Being based on UML State Charts, the graphical input language is intuitive to use and can directly serve as the documentation of the model. Compared to previous approaches, we propose an extension to UML that allows specifying all supported abstraction levels of a model in a single source, easing both development and debugging. We also present a code generator that allows selecting a specific abstraction level from the model to automatically generate SystemC code for it. Additionally, we use a modeling style extending existing work for purely cycle-accurate State Charts so that a previously presented code generation approach for VHDL can be reused.
使用状态图对不同抽象级别进行单源硬件建模
本文提出了一种在不同抽象层次(从非定时到周期精确)上进行硬件建模的方法和框架。基于UML状态图,图形输入语言使用起来很直观,可以直接作为模型的文档。与以前的方法相比,我们建议对UML进行扩展,允许在单个源中指定模型的所有受支持的抽象级别,从而简化开发和调试。我们还提供了一个代码生成器,它允许从模型中选择一个特定的抽象级别来自动为它生成SystemC代码。此外,我们使用一种建模风格来扩展纯周期精确状态图的现有工作,以便可以重用先前为VHDL提供的代码生成方法。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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