Novel 4F2 DRAM cell with Vertical Pillar Transistor(VPT)

Abstract

New 4F2 cell structure of VPT for the future DRAM devices has been successfully developed by using 30nm process technology. The VPT shows superior current driving capability of 33μA and steep subthreshold slope of 77mV/dec. The VPT device demonstrates excellent retention characteristics in static mode. The floating body effects can be reduced by adopting the gradual junction profile even in a pillar-type channel. Also, the VPT produces about 60% and 30% more gross dies per wafer than conventional 8F2 and 6F2 cells.