Folded gate LDMOS with low on-resistance and high transconductance

Abstract

In this paper, a novel LDMOSFET is proposed with low on-resistance and high transconductance. The silicon substrate surface is trenched by using an extra mask, resulting in a folded gate structure. The channel density is doubled in the experiment. With the Folded Gate LDMOS (FG-gate LDMOS) concept, the on-resistance was reduced by 40%, while the transconductance was improved by 80%. The significance of the folded gate concept will be available for CMOS and other MOS-gated devices.