Analysis and Compact Modeling of Drain-Extended FinFET

Abstract

In this article, a comprehensive simulation and the compact model of drain extended FinFET for high power application is presented. Power FinFETs with different drain-extension designs (i.e. (i) multi-fin drain extended FinFET (ii) planar drain-extended FinFET) are simulated and analysed using 3-D Technology Computer-Aided Design (TCAD) simulation. TCAD calibrated intrinsic FinFET is modeled by the industry standard BSIM-CMG model. To model the effect of quasi-saturation due to drain-extension, current dependent resistance model is used along with BSIM-CMG model. The model is validated with TCAD simulations and, can be used for high power circuit simulations.