L. Ragnarsson, H. Dekkers, P. Matagne, T. Schram, T. Conard, N. Horiguchi, A. Thean
{"title":"Zero-thickness multi work function solutions for N7 bulk FinFETs","authors":"L. Ragnarsson, H. Dekkers, P. Matagne, T. Schram, T. Conard, N. Horiguchi, A. Thean","doi":"10.1109/VLSIT.2016.7573393","DOIUrl":null,"url":null,"abstract":"A novel multi work function process is used to demonstrate up to 250 mV effective work function shifts of nMOS devices. The process use SiH4-soak of ALD TiN to change its barrier properties with ALD TiAl. FinFET devices are demonstrated with ~100 mV VT-shift for 24-nm-LG devices resulting in 20× reduction in off-state leakage at unaffected sub threshold slope and improved mismatch behavior. A patterning scheme using an nMOS first RMG process is proposed and demonstrated.","PeriodicalId":129300,"journal":{"name":"2016 IEEE Symposium on VLSI Technology","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2016.7573393","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
Abstract
A novel multi work function process is used to demonstrate up to 250 mV effective work function shifts of nMOS devices. The process use SiH4-soak of ALD TiN to change its barrier properties with ALD TiAl. FinFET devices are demonstrated with ~100 mV VT-shift for 24-nm-LG devices resulting in 20× reduction in off-state leakage at unaffected sub threshold slope and improved mismatch behavior. A patterning scheme using an nMOS first RMG process is proposed and demonstrated.