Low-temperature metal/ON/HSG-cylinder capacitor process for high density embedded DRAMs

Abstract

A logic-process-compatible low-temperature hemispherical grain (HSG) cylinder capacitor process with maximum process temperature below 700/spl deg/C is developed. Depletion in HSG-grains and top-electrodes due to decreasing thermal budget is effectively suppressed by phosphorus doping with PH/sub 3/-annealing and the use of metal plate-electrodes. By combining with the HSG grain size optimization, the low-temperature process with highly reliable oxynitride (ON) dielectrics can be applied to high density embedded DRAM cells down to 0.13 /spl mu/m design rules.