Investigation of a lead-free flip chip assembly process

Abstract

The integration of passive components into a single chip was developed to meet the increasing demands on cost and size reduction of the current RF power amplifier modules. Flip chip assembly on a laminate substrate using lead-free solder bumps was used for the module level assembly. In this paper, the detailed investigation of the assembly process is reported. This includes, among others, solder paste printing, flip chip placement and underfill application. The challenge of this flip chip assembly was the lead-free processing in both first level and second level interconnects and the required short throughput time from the pre-development to the mass production in the factory. First an orientation study was performed to find an optimum process window and two potential underfill candidates. Samples were made with the optimum process setting. To verify the process feasibility, thermal shock testing, moisture sensitivity assessment and high temperature storage testing were carried out. The reliability test results showed that one type of underfill performed very well, while another one could not meet the reliability requirements. The root failure cause with the troublesome underfill was found not to be caused by the assembly process but to be related to the underfill material and the via construction in the substrate.