Modeling and simulation of 12.5 Gb/s on a HyperBGA/sup /spl reg// package

Abstract

This paper presents high-speed/high-frequency modeling and simulation results for Endicott Interconnect Technologies' HyperBGA/sup /spl reg// organic chip-carrier package. Utilizing industry leading advanced software tools, Ansoft Links/sup TM/, Ansoft HFSS/sup TM/, and Ansoft Serenade/sup /spl reg//, this modeling and simulation effort has demonstrated that current HyperBGA/sup /spl reg// technology will meet the performance requirements for applications running at speeds of 12.5 Gb/s per channel. Throughout the course of this discussion, the general modeling and simulation methodology is revealed, along with the actual physical structures modeled and the inherent assumptions and boundary conditions involved.