A new type of SiC-VJFET with extreme low feedback capacitance

Abstract

In this paper, we propose a novel SiC vertical JFET (VJFET) with low feedback capacitance Crss by using a device simulator. A key feature of the proposed VJFET is the p+ screen grid inserted between gate and drain electrode. The screen grid is effective to reduce the Crss by 80% compared to conventional VJFETs. Due to the low Crss, total power loss of the proposed VJFET is the lowest among existing SiC power devices. This new VJFET can be a promising candidate for a high-speed and low-loss SiC power device.