The p-MOS controlled lateral thyristor: A MOS controllable thyristor suitable for integration

Abstract

A novel CMOS compatible lateral thyristor is proposed in this paper. Its thyristor conduction is fully controlled by a p-MOS gate. Loss of MOS control due to parasitic latch-up has been eliminated and triggering of the main thyristor at lower forward current achieved. The device operation has been verified by 2D numerical simulations and experimental fabrication.