Transmission Electron Microscopy Sample Preparation By Design Based Recipe Writing in a DBFIB Part 2

J. Demarest, B. Austin, J. Arjavac, M. Breton, M. Bergendahl, M. Biedrzycki, C. Boye, B. Cilingiroglu, J. Gaudiello, J. Hager, S. Matham, K. Nguyen, M. Persala, M. Rizzolo, S. Shaar, S. Teehan
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Abstract

Demarest et al. concluded in their previous report that a ten times improvement in placement accuracy was required to enable automated transmission electron microscopy (TEM) sample preparation, and wafer alignment by GDS coordinates demonstrated a factor of two improvement in comparison to optical or scanning electron microscope based processes. This paper provides an additional update on this project. The study is about a GDS based process developed to simplify the complicated workflow for examining discrete electrical failures. The results of this study indicated that the recipe prototype developed on a test structure had a unique feature that consisted of an approximately 45nm by 200nm Cu line segment. Executing the prototype recipe on a wafer at the same process point fabricated 6 months after the original wafer yielded four identical successful samples of about 30nm sample thickness. This technique can thus be extended to large 2D arrays of small structures.
基于配方书写设计的DBFIB透射电镜样品制备(二)
Demarest等人在之前的报告中得出结论,要实现自动透射电子显微镜(TEM)样品制备,需要将放置精度提高十倍,与基于光学或扫描电子显微镜的工艺相比,通过GDS坐标对晶圆进行校准证明了两倍的改进。本文提供了该项目的额外更新。这项研究是关于一种基于GDS的流程,旨在简化检查离散电气故障的复杂工作流程。研究结果表明,在测试结构上开发的配方原型具有独特的特征,由大约45nm × 200nm的Cu线段组成。6个月后,在同一工艺点的晶圆上执行原型配方,获得了4个相同的样品,样品厚度约为30nm。因此,该技术可以扩展到小型结构的大型二维阵列。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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