Nanophotonic interconnection networks for performance-energy optimized computing

Abstract

As computing performance continues to grow through the increasing number of processing cores, the interconnection network has become the central subsystem for providing the communications infrastructure. Electronic interconnects are increasingly bound by the associated power dissipation of high-bandwidth data movement. Recent advances in chip-scale silicon photonic technologies have created the potential for developing optical interconnects that can offer highly energy efficient communications. This talk will examine the design and performance of photonic networks-on-chip architectures that support both on-chip and memory access communication in an energy efficient manner.