Laser de-bonding process development of glass substrate for Fan-out wafer level packaging

H. Hsiao, S. W. Ho, B. L. Lau
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引用次数: 6

Abstract

Due to the demand of consumer electronics products for portable and multi-function, the development of microelectronic packaging forced to reduce the size and costs, to raise high performance. The trend causes the traditional wafer level packaging (WLP) integration great challenges: (1) when the chip size continued to scaling and solder balls became large for back-end package; it does not fit it inside the chip area for Semiconductor technological progress. (2) The chips become strong and I/O numbers increased make more difficult for WLP integration. If I/O numbers and the solder ball size decreased, it can product the I/O numbers and solder ball inside the chip area. However, the limited of the design rules for PCB assembly which has not reached manufacturing specifications for the front-end IC chips. And the I/O numbers and solder ball size will increase additional assembly costs. In recent years, the industry has developed Fan-out WLP can solve the above traditional WLP integration challenges. For Infineon in 2006 proposed the Fan-out WLP Technology [1-3]. In the Fan-out WLP integration process, multichip temporary de-bonding is the most important key technology. In recent times, a lot of studies for the de-bonding process to make wafer release, including chemical dissolution, thermal release device and laser ablation technology. There exist a number of approaches to the de-bonding of thinned device wafers: they may be released by exposure to chemical solvents delivered through perforations in the handler, by mechanical peeling from an edge-initiated separation point, or by heating the adhesive to the point where the silicon device wafer may be removed by sheering or peeling [4]. The de-bonding process for Fan-out WLP needs low-temperature and zero-force de-bonding. Therefore, this paper used the UV laser ablation de-bonding technology which process can use a glass substrate and can be handled at low temperature. The UV laser de-bonding process has been successfully achieved to apply in Fan-out WLP.
扇出晶圆级封装玻璃基板激光脱键工艺研究
由于消费电子产品对便携和多功能的需求,微电子封装的发展迫使其减小尺寸和成本,提高高性能。这一趋势给传统的晶圆级封装(WLP)集成带来了巨大的挑战:(1)当芯片尺寸持续缩放时,后端封装的焊料球变大;它不适合它在半导体技术进步的芯片领域。(2)芯片变得更加强大,I/O数量增加,使WLP集成更加困难。如果I/O数和焊球尺寸减小,则可以在芯片内产生I/O数和焊球面积。然而,PCB组件的设计规则的局限性还没有达到前端IC芯片的制造规范。I/O数量和焊球尺寸将增加额外的组装成本。近年来,业界开发的扇出式WLP可以解决上述传统WLP集成的难题。2006年英飞凌提出了扇出式WLP技术[1-3]。在扇出式WLP集成过程中,多芯片临时脱键是最重要的关键技术。近年来,人们对脱键工艺进行了大量的研究,包括化学溶解、热释放装置和激光烧蚀技术。有许多方法可以使变薄的器件晶圆脱键:它们可以通过暴露在通过处理器穿孔输送的化学溶剂中来释放,可以通过从边缘开始的分离点进行机械剥离,或者通过将粘合剂加热到可以通过剪切或剥离[4]来去除硅器件晶圆的点。扇形外壁板的脱键工艺需要低温零力脱键。因此,本文采用了紫外激光烧蚀脱键技术,该工艺可以在玻璃基板上进行,并且可以在低温下处理。成功地实现了紫外激光脱键工艺,并将其应用于扇出式WLP中。
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