Non-Contact, Pad-less Measurement Technology and Test Structures for Characterization of Cross-Wafer and In-Die Product Variability

G. Steinbrueck, J. Vickers, M. Babazadeh, M. Pelella, N. Pakdaman
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引用次数: 3

Abstract

Monitoring and controlling cross-wafer and in-die variability has been recognized as the dominant and escalating factors for the successful commercialization of modern-day integrated circuit products utilizing advanced semiconductor manufacturing[1,2]. In this paper we present a Performance Based Metrology (PBM), a measurement technology for closing the information gap between the design, process integration, and manufacturing groups with respect to accounting for variability. PBM enables the "porting" of scribe-like and end-of-line contact tested measurements to within the product die active area to it provide the capability to significantly reduce the cycles of learning to obtain relevant and key process, device, and product metrics. This product-relevant information can then be used for process monitoring and control, performance optimization, and to enhance early bin-yield predictability. The technique would reduce or eliminate the need for send-ahead test wafers and other "disruptive" measurements by making possible in-die, non-contact characterization of product performance monitors and devices. We describe the in-line measurement system and review the design and implementation considerations for the non-contact test structures incorporated on product wafers. Experimental results from PBM measurements on several generations (90, 65, and 45nm) of bulk-Si and SOI product wafers and devices are presented to illustrate the capabilities of the technique.
跨晶圆和模内产品可变性表征的非接触、无衬垫测量技术和测试结构
监测和控制晶圆间和晶片内的可变性已被认为是利用先进半导体制造的现代集成电路产品成功商业化的主要和升级因素[1,2]。在本文中,我们提出了一种基于性能的计量(PBM),这是一种测量技术,用于缩小设计,过程集成和制造组之间的信息差距,并考虑到可变性。PBM允许将划线和线尾接触测试测量“移植”到产品模具活动区域内,从而提供了显著减少学习周期的能力,以获得相关的关键过程、设备和产品指标。然后,这些与产品相关的信息可用于过程监视和控制、性能优化,并增强早期单产的可预测性。该技术将减少或消除对预先测试晶圆和其他“破坏性”测量的需求,使产品性能监视器和设备的模内非接触式表征成为可能。我们描述了在线测量系统,并回顾了集成在产品晶圆上的非接触测试结构的设计和实现考虑因素。在几代(90nm、65 nm和45nm)的大块硅和SOI产品晶圆和器件上进行PBM测量的实验结果说明了该技术的能力。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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