Highly scalable and fully logic compatible SRAM cell technology with metal damascene process and W local interconnect

M. Inohara, H. Oyamatsu, Y. Unno, Y. Fukaura, S. Goto, Y. Egi, M. Kinugawa
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引用次数: 3

Abstract

For future SRAM cells, scalability with operation voltage reduction as well as device dimensions is very desirable. Moreover, higher compatibility with advanced logic process will become important more and more due to requirements from high performance SRAM-embedded LSIs such as RISC chips or multimedia LSIs. However, although a lot of candidates for the future SRAM cell have been reported, there have been few paper discussing systematically what kind of cell technology can be the main stream for future SRAM cells. In this paper, a SRAM technology with high scalability and excellent logic process compatibility has been proposed as a result of systematic consideration. In this technology, 6Tr. cell with small parasitic resistance is chosen for high cell stability under low operation voltage. W local interconnect (LI) is also implemented to realize smaller cell size with reduced bit-line capacitance. Moreover, cell layout as well as fabrication process is designed to be preferable for metal damascene process. With using damascene technology, W-LI can be fabricated by simple contact W-plug process simultaneously. As a result, highly scalable 6Tr. cell, which can be fabricated by an advanced logic process without any photo mask or process step increase, has been obtained. In order to demonstrate this cell technology, a 0.25 /spl mu/m SRAM cell with the cell size of 3.9 /spl mu/m/sup 2/ was fabricated and evaluated. Moreover, the scalability of this cell technology down to 0.15 /spl mu/m generation was confirmed by simulation.
高度可扩展和完全逻辑兼容的SRAM单元技术与金属damascene工艺和W本地互连
对于未来的SRAM单元,操作电压降低以及器件尺寸的可扩展性是非常理想的。此外,由于高性能sram嵌入式lsi(如RISC芯片或多媒体lsi)的要求,与高级逻辑过程的更高兼容性将变得越来越重要。然而,尽管已经报道了许多未来SRAM电池的候选材料,但很少有论文系统地讨论什么样的电池技术可以成为未来SRAM电池的主流。经过系统的考虑,本文提出了一种具有高扩展性和良好逻辑过程兼容性的SRAM技术。在这项技术中,6Tr。选用寄生电阻小的电芯,在低工作电压下具有较高的稳定性。W本地互连(LI)也被实现,以实现更小的电池尺寸和减少的位线电容。此外,设计的单元布局和制造工艺更适合金属腐蚀工艺。采用damascene技术,可以通过简单的接触w塞工艺同时制备W-LI。因此,高度可扩展的6Tr。在不增加光掩模和制程阶跃的情况下,采用先进的逻辑工艺制备出了该电池。为了证明这种电池技术,我们制作了一个0.25 /spl mu/m的SRAM电池,电池尺寸为3.9 /spl mu/m/sup 2/。此外,通过仿真验证了该电池技术的可扩展性,低至0.15 /spl mu/m代。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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