{"title":"System level BIT: a tool for MATE test station self maintenance","authors":"J. Seeger","doi":"10.1109/AUTEST.1989.81132","DOIUrl":null,"url":null,"abstract":"The author examines what can be done in a MATE environment to reduce self-test runtime and at the same time provide increased fault detection and isolation. His solution involves the integration of VMEbus extension for instrumentation (VXI bus) technology and existing BIT (built-in-test) techniques. This integration produces a system-level BIT capable of utilizing integrated test station resources to keep the BIT hardware/firmware overhead to a minimum. In addition, data collected during system level BIT can be used to compensate for instrument drift and path loss, reducing the frequency of routine calibration and alignment of test station instruments.<<ETX>>","PeriodicalId":321804,"journal":{"name":"IEEE Automatic Testing Conference.The Systems Readiness Technology Conference. Automatic Testing in the Next Decade and the 21st Century. Conference Record.","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-09-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Automatic Testing Conference.The Systems Readiness Technology Conference. Automatic Testing in the Next Decade and the 21st Century. Conference Record.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/AUTEST.1989.81132","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The author examines what can be done in a MATE environment to reduce self-test runtime and at the same time provide increased fault detection and isolation. His solution involves the integration of VMEbus extension for instrumentation (VXI bus) technology and existing BIT (built-in-test) techniques. This integration produces a system-level BIT capable of utilizing integrated test station resources to keep the BIT hardware/firmware overhead to a minimum. In addition, data collected during system level BIT can be used to compensate for instrument drift and path loss, reducing the frequency of routine calibration and alignment of test station instruments.<>