{"title":"Advanced Gate-stack Architecture For Low-voltage Dual-workfunction CMOS Technologies With Shallow Trench Isolation","authors":"Schwalke, Kerber, Koller, Ludwig, Seidl","doi":"10.1109/VLSIT.1997.623700","DOIUrl":null,"url":null,"abstract":"In this work we present the advanced gate-stack architecture EXTIGATE (Extended Trench Isolation GAte TEchnology) which solves major problems associated with n+/p+ dual workfunction gate technology and shallow-trench-isolation (STI). These achievements are realized without an increase in process complexity. Furthermore, the process window is enlarged leading to a robust low-voltage dual-workfunction STI-CMOS process.","PeriodicalId":414778,"journal":{"name":"1997 Symposium on VLSI Technology","volume":"255 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1997 Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.1997.623700","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
In this work we present the advanced gate-stack architecture EXTIGATE (Extended Trench Isolation GAte TEchnology) which solves major problems associated with n+/p+ dual workfunction gate technology and shallow-trench-isolation (STI). These achievements are realized without an increase in process complexity. Furthermore, the process window is enlarged leading to a robust low-voltage dual-workfunction STI-CMOS process.