Degradation of electromigration lifetime by post-annealing for Cu/low-k interconnects

Abstract

Cu/low-k interconnects are widely used for 130 nm-node LSIs and beyond, and their electromigration (EM) reliability has been reported. The effects of annealing after Cu plating on the EM reliability and Cu film characteristics such as post-CMP defects have been studied previously. However, the effects of thermal processes after forming interconnect structures are somewhat missing. In the fabrication of multilevel interconnects, the lower level interconnects are annealed many times during the thermal processes for the upper level interconnects. So, it is important to forecast the EM lifetime taking the influence of total thermal processes into consideration. But few works have been reported. In this study, we evaluate the influence of post-annealing on EM reliability. Results indicate that EM lifetime was degraded by post-annealing packaged samples, and it is suggested that EM lifetime for lower level interconnects potentially degrades by thermal processes during multilevel interconnect fabrication.