Using Grid Search Methods and Parallel Computing to Reduce AI Training Time for Reliability Lifetime Prediction of Wafer-Level Packaging

Abstract

Electronic packaging technology undergoes Accelerated Thermal Cycling Test (ACTC) before hitting the market. Finite element analysis is commonly used to build models for electronic packaging products. However, simulation errors may arise due to differences in physical concepts and considerations among researchers. To overcome this challenge, we create a database through validated finite element models and combine it with machine learning. In the domain of machine learning models, training time is a crucial research focus. Nevertheless, grid search time is often overlooked, despite its significant impact on machine learning model efficiency. To address this issue, this study utilizes parallel computing to explore the search for optimized hyperparameters in the context of the Wafer Level Chip Scale Package (WLCSP) as a case study. Additionally, custom empirical formulas are utilized to enhance the efficiency of grid search methods, thereby improving the time-to-market and competitiveness of packaged products.